Q-NOTE QN-7000HX Informations techniques télécharger pdf (Page 7)

Before You Begin: Important Concepts

XAPP1206 v1.1 June 12, 2014 www.xilinx.com 7

Figure 2 compares SIMD parallel add with 32-bit scalar add.

To achieve four separate additions using scalar operation requires you to use four add

instructions, as shown in Figure 2, and additional instructions to prevent one result from

overflowing into the adjacent byte. SIMD needs only one instruction to do this, and you do not

need to manage the overflow. Moreover, with a dedicated ALU, SIMD instructions generally

require fewer cycles than ARM instructions for the same functions.

Registers

NEON architecture allows for 64-bit or 128-bit parallelism. Its register bank can be viewed as

either sixteen 128-bit registers (Q0-Q15) or as thirty-two 64-bit registers (D0-D31). Each of the

Q0-Q15 registers maps to a pair of D registers.

Figure 3 shows the NEON register bank.

NEON and VFP

The Zynq-7000 platform has both NEON and VFP integrated. The key differences between

NEON and VFP are that NEON only works on vectors, but VFP does not, even though it has

“vector” in its name. In fact, calling it a floating-point unit (FPU) can be more appropriate for the

X-Ref Target - Figure 2

Figure 2: Comparing SIMD Parallel ADD with 32-bit Scalar ADD

X-Ref Target - Figure 3

Figure 3: NEON Register Bank

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